Enhancing platform protection with a digital receiver/exciterStory
April 29, 2011
SWaPping out analog: DREs embedded in VPX and other modules pack enough Digital RF Memory punch at low enough SWaP to equip rugged, small platforms with mission-critical ECM.
Controlling the electromagnetic spectrum using Electronic Countermeasures (ECM) is crucial for survival in the combat theater. Designers of military platforms such as aircraft, surface ships, and ground vehicles are faced with the dual challenge of using onboard radar systems for their own situational awareness and weapons systems control, while simultaneously using ECM to defeat or deceive hostile radar systems trying to detect them. Digital Receivers and Exciters (DRE) are replacing previous generations of purpose-built analog hardware with DSP engines and field upgradeable software/firmware. While this capability has previously been available in ground installations or on large airborne platforms such as the C-130, Size, Weight, and Power (SWaP) requirements have meant that smaller platforms such as single-seat fighters have been denied many of these capabilities, until now.
Electronic Countermeasures protect friendly assets
ECM can be used to deny or confuse any part of the electromagnetic spectrum to disrupt communications or to avoid detection by sensors such as radar. To deceive an enemy radar, incoming pulses are identified and analyzed to be retransmitted as false echoes that appear to come from a different position or from multiple targets. Specialized airborne ECM platforms such as the EC-130H or EP-3 can protect multiple types of friendly aircraft within a battle space under surveillance by many radar types and positions. However, these are large platforms, not typically space- or weight-constrained, often having controlled, pressurized environments. Consequently, state-of-the-art commercial equipment can be deployed to digitally process any radar threats and provide protection in real time. The development of highly capable yet rugged digital signal acquisition and processing capability is now enabling integrators to extend this protection capability to: combat aircraft, Unmanned Aerial Vehicles (UAVs), helicopters, or ground vehicles.
Over time, jamming has developed from wideband denial and the use of chaff – both of which will confuse friendly and enemy radar alike – to much more sophisticated replication of timing and pulse shapes. The final Intermediate Frequency (IF) stage of an ECM receiver will generally use an analog discriminator to measure radar pulses, but long-term instability and drift with temperature of the analog filters require regular recalibration for reliable operation. For maximum deception, pulse shapes must be accurately reproduced, and replacing the analog discriminator with digital signal processing is now preferred. But to achieve this will typically require signal sampling at 1.5 GHz with 10-bit resolution, to give real 8-bit digitization and up to 500 MHz bandwidth for the accuracy needed. Sampling at this rate generates vast amounts of data that can be transferred to a separate processing engine, or can be stored and processed locally in Digital RF Memory (DRFM). In either case, processing power is vital to reducing the time it takes to retransmit false echoes, particularly when countering increasingly agile radar systems.
The basic elements of a generic DRE are a front-end analog-to-digital converter, large capacity DRFM typically with Gigabytes of memory, a programmable signal processing engine, and a digital-to-analog converter to produce the false echoes. By their very nature, ECM characteristics and algorithms are proprietary and highly classified; thus, integrators and end users look for reprogrammability of the processing engine so that algorithms can be upgraded as radars evolve, yet be easily erased for security. The signal-processing engine could use a general-purpose processor device, but an FPGA such as Xilinx’s Virtex-6 offers more in much less space. The Virtex-6 SXT family offers up to 2,016 DSP slices for the massively parallel processing task of analyzing the incoming data at IF rates and the creation of false echoes to drive the digital-to-analog converter.
Embedding DREs using VPX
Open standards-based, integrated system architectures are well established as a means of saving vital SWaP. These architectures, often implemented using the rugged VPX (VITA 46) packaging standard, integrate many previously separate subsystems – such as fire control, missile warning, or DRE subsystems – into a platform’s main computing system. The modularity and architecture of VPX with its high-speed serial data and control planes plus the choice of 3U or 6U module sizes provide an ideal basis for COTS vendors to offer easily integrated subsystems or functions to embed within such a larger system. Based on a single 3U VPX module, the SPR870A from GE Intelligent Platforms provides a complete DRE subsystem with a programmable SX475T Virtex-6 FPGA and PCI Express VPX data plane (Figure 1).
Figure 1: The SPR870A based on a single 3U VPX module from GE Intelligent Platforms
(Click graphic to zoom by 1.9x)
In general, a DRE would be tailored to a specific radar type or frequency band. Hence, specialized ECM platforms will have many DREs to provide complete battle-space coverage. For rugged, small platforms, VPX with its PCI Express data plane offers a scalable solution, accommodating more than one DRE per VPX chassis for enhanced protection now and future growth as radar systems continue to evolve.
To learn more, e-mail Duncan at [email protected]