Military Embedded Systems

RF transceivers provide breakthrough SWaP solutions for defense and aerospace applications


October 19, 2016

David Brown

Analog Devices

Wyatt Taylor

Analog Devices

Integrating more software control and cognitive abilities to military radios demands a more frequency- and bandwidth-flexible radio frequency (RF) design. To achieve this goal, static filters need to be removed and replaced with tunable filters. Similarly, the concept of a common platform would allow for shorter development times, reduced manufacturing costs, and provide greater interoperability between systems. The common platform demands that the RF system be capable of providing full performance for applications that traditionally have had very different architectures. Future radio platforms are pushing size and power demands to a new extreme.

Since its inception, the super-heterodyne architecture has been the backbone of radio design for defense and aerospace systems. Whether it is a handheld soldier radio, unmanned aerial vehicle (UAV) data link, or a signal intelligence (SIGINT) receiver, the single- or two-mixing-stage super-heterodyne architecture is the common choice. The benefits of this design are clear: proper frequency planning can enable very low spurious emissions, channel bandwidth and selectivity is set by the intermediate frequency (IF) filters, and the gain distribution across the stages allows for a tradeoff between optimizing noise figure and linearity. (Figure 1.)


Figure 1: Basic super-heterodyne architecture




During more than nearly one hundred years of use, the super-het architecture has seen significant gains in performance across the entire signal chain. Microwave and RF devices have improved their performance while decreasing power consumption. Analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) have increased sample rate, linearity, and effective number of bits (ENoB). More performance gains: Processing capability in field-programmable gate arrays (FPGAs) and digital signal processors (DSPs) has followed Moore’s Law and increased with time, allowing for more efficient algorithms, digital correction, and further integration. Additionally, strides made in packaging technology have shrunk device pin density while simultaneously improving thermal handling.

However, these device-specific improvements are beginning to reach the point of diminishing returns. While the RF components have followed a reduced size, weight, and power (SWaP) trend, high-performance filters remain physically large and are often custom designs, thus adding to overall system cost. Additionally, the intermediate-frequency (IF) filters set the analog channel bandwidth of the platform, making it difficult to create a common platform design that can be reused across a wide range of systems. For package technology, most manufacturing lines will not go below a 0.65- or 0.8-mm ball pitch, meaning that there is a limit on how physically small a complex device with many input and output (I/O) requirements can become.

Zero-IF architecture

An alternative to the super-het architecture that has re-emerged as a potential solution in recent years is the Zero-IF (ZIF) architecture (Figure 2). A ZIF receiver uses a single frequency mixing stage with the local oscillator (LO) set directly to the frequency band of interest, translating the received signal down to baseband in-phase (I) and quadrature (Q) signals. This architecture alleviates the stringent filtering requirements of the super-het, since all analog filtering takes place at baseband, where filters are much easier to design and less expensive than custom RF/IF filters. The ADC and DAC are now operating on I/Q data at baseband, so the sample rate relative to the converted bandwidth can be reduced, saving significant power. From many design aspects, ZIF transceivers provide significant SWaP reduction as a result of reduced analog front-end complexity and component count.


Figure 2: Zero-IF architecture.




There are, however, some drawbacks to this system architecture that need to be addressed. The direct frequency conversion to baseband introduces a carrier-leakage and image-frequency component. Mathematically, the imaginary components of I and Q signals cancel out due to their orthogonality (Figure 3). Due to real-world factors such as process variation and temperature deltas in the signal chain, it is impossible to maintain a perfect 90-degree phase offset between the I and Q signals, resulting in degraded image rejection. Additionally, imperfect LO isolation in the mixing stage introduces carrier leakage components. When left uncorrected, the image and carrier leakage can degrade a receiver’s sensitivity and create undesirable spectral emissions.


Figure 3: Zero-IF image cancellation.




Historically, the I/Q imbalance has limited the range of applications that were appropriate for the ZIF architecture. This was due to two reasons: First, a discrete implementation of the ZIF architecture will suffer from mismatches both in the monolithic devices and also the printed circuit board (PCB). In addition, the monolithic devices could pull from different fabrication lots, making exact matching very difficult due to native process variation. A discrete implementation will also have the processor physically separated from the RF components, making a quadrature correction algorithm very difficult to implement across frequency, temperature, and bandwidth.

Integrated transceivers provide SWaP solution

Integrating the ZIF architecture into a monolithic transceiver device provides the path forward for next-generation systems. By having the analog and RF signal chain on a single piece of silicon, process variation will be kept to a minimum. In addition, DSP blocks can be incorporated into the transceiver, removing the boundary between the quadrature calibration algorithm and the signal chain. This approach provides both unparalleled improvements in SWaP and can also match the super-het architecture for performance specifications.

Analog Devices offers two transceivers aimed at use in the defense and aerospace markets: the AD9361 and AD9371 (Figure 4). These devices integrate the RF, analog, and digital signal chain onto a single CMOS device and include digital processing to run quadrature and carrier leakage correction in real time across all process, frequency, and temperature variations. The AD9361 focuses on medium performance specifications and very low power, such as UAV data links, handheld and man-pack communication systems, and small-form-factor SIGINT. The AD9371, optimized for very high performance specifications and medium power, has an integrated ARM microprocessor for refined calibration control, as well as an observation receiver for power amplifier (PA) linearization and a sniffer receiver for white-space detection. These features mean that communication platforms using wideband waveforms, or occupying noncontiguous spectrum, can now be implemented in a much smaller form factor. The high dynamic range and wide bandwidth enables SIGINT, EW, and phased-array radar operation in locations with highly congested RF spectrum.


Figure 4: AD9361 and AD9371 block diagrams.



The next generation is now

One hundred years of device optimization had allowed the super-het to achieve greater and greater performance, in continually smaller and lower-power platforms. Those improvements are beginning to slow, as physical limitations become real. Next-generation aerospace and defense platforms will demand a new approach to RF design, one where several square inches of an existing platform is integrated into a single device. In these devices the boundary between software and hardware is blurred, allowing for greater optimization and integration and where decreased SWaP no longer means decreased performance.

David Brown is an RF system applications engineer with Analog Devices, Inc., in Greensboro, North Carolina. He joined Analog Devices in 2015 and focuses primarily on defense and aerospace applications. David graduated from NC State University in 2014 with a bachelor’s degree in electrical engineering.

Wyatt Taylor is a senior RF systems engineer with Analog Devices, Inc., in Greensboro, North Carolina. He is focused on defense and aerospace radio applications, with a particular emphasis on integrated RF transceivers, small-form-factor microwave design, and software-defined radio (SDR). Formerly, Wyatt was an RF design engineer at Thales Communications Inc., and Digital Receiver Technology, Inc., in the Maryland area. Wyatt received his MSEE and BSEE from Virginia Tech.

Analog Devices, Inc.


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