TEWS Technologies Adds Higher Performance Advanced FPGA to Enhance Existing Range of Digital and Analog XMC Modules
ProductFebruary 12, 2024
PINNEBERG, Germany. TEWS Technologies has lanched its latest product: TXMC639 - Reconfigurable FPGA with 16x Analog Input 8x Analog Output and 32x Digital I/O.
The TXMC639 is a standard single-width Switched Mezzanine Card (XMC) module that features a user-configurable FPGA (AMD Kintex™ 7) with up to 16 differential ADC input channels and up to 8 single-ended DAC output channels. The ADC input channels are based 16 bit 1.5 Msps LTC2320-16 ADC. Each channel has a 16 bit resolution and can operate at up to 1.5 Msps, with configurable differential input voltage ranges.
The DAC output channels are based on the Dual 16 bit AD5547 DAC. Each DAC output is configurable as a single-ended bipolar analog output with selectable voltage ranges.
The module also offers 32 ESD-protected TTL lines for a flexible digital interface, all individually programmable as input or output. Additionally, 16 of these TTL lines can be switched via the Board Configuration Controller (BCC) to provide 8 RS422 interfaces.
The module provides FPGA I/Os and Multi-Gigabit Transceivers for customer-specific I/O extension or inter-board communication.
The User FPGA is connected to a 1 GB DDR3L SDRAM, and the module comes with an FPGA Board Reference Design (BRD) loaded into the user FPGA by default. Configuration can be done through SPI flash, BCC, or JTAG interface, with support for PCIe specification compliance.
User applications for the TXMC639 with Kintex™ 7 FPGA can be developed using the AMD Vivado™ design tool. TEWS offers a well-documented FPGA Board Reference Design. It includes a constraint file with all necessary pin assignments and basic timing constraints. The FPGA Board Reference Design covers the main functionalities of the board.
The TXMC639 is delivered with the FPGA Board Reference Design. The FPGA could be programmed via the on-board Board Configuration Controller (BCC). Programming via JTAG interface using an USB programmer is also possible. In accordance with the PCI specification and the buffering of PCI header data, the contents of the user FPGA can be changed during operation.
TEWS Technologies is an Elite Certified AMD Adaptive Computing Partner and offers FPGA Design and Integration services for all its FPGA solutions. The engineering team specializes in designing highly optimized FPGA designs and has extensive experience in minimizing FPGA gate usage. Having the FPGA custom designed according to the customer’s needs avoids overhead and delays leading to a reduction of costs for the customer.
