Coprocessor solution improves FPGA efficiency

Product

February 10, 2013

John McHale

Editorial Director

Military Embedded Systems

Dubbed “Anemone acceleration technology,” a coprocessor floating-point signal processing solution from BittWare in Concord, NH, mitigates FPGA programming challenges by offloading C-language processing tasks from an FPGA. The FPGA handles all the I/O interfacing, memory, protoc...

Dubbed “Anemone acceleration technology,” a coprocessor floating-point signal processing solution from BittWare in Concord, NH, mitigates FPGA programming challenges by offloading C-language processing tasks from an FPGA. The FPGA handles all the I/O interfacing, memory, protocol processing, and special functions, as well as any computational tasks it might need to perform, leaving Anemone free to handle more complex processing functions. Anemone is an implementation of the Epiphany architecture from Adapteva in Lexington, MA. BittWare’s Anemone family leverages Altera Stratix FPGAs in a PCIe product line, OpenVPX-based products, and a VITA 57 FMC device.

The S5-6U-VPX (S56X) is a rugged 6U VPX card using the Altera Stratix V GX/GS FPGA. The FPGA can be paired with BittWare’s Anemone FPGA coprocessor, the ARM Cortex-A8 control processor, and the ATLANTiS FrameWork FPGA development kit, for high-performance signal processing and data acquisition applications such as radar and signal intelligence. The board includes a configurable 48-port multigigabit transceiver interface supporting protocols such as Serial RapidIO, PCI Express, and 10 GbE. Two optional Anemone104 processors are available for the S56X as coprocessors for the Stratix V FPGA. BittWare also offers an S5-6U-VPX device with FMC I/O and has a 3U OpenVPX product coming soon.