Reconfigurable FPGA with 64 TTL I/O / 32 Diff. I/O
Eletter ProductTEWS TECHNOLOGIES now offers the TPMC632, a standard single-width 32 bit PMC module providing a user-configurable XC6SLX45T-2 or XC6SLX100T-2 Spartan-6 FPGA. The integrated Spartan-6s PCIe Endpoint Block is connected to a PCIe-to-PCI Bridge which is routed to the PMC PCI Interface.
TEWS TECHNOLOGIES now offers the TPMC632, a standard single-width 32 bit PMC module providing a user-configurable XC6SLX45T-2 or XC6SLX100T-2 Spartan-6 FPGA. The integrated Spartan-6s PCIe Endpoint Block is connected to a PCIe-to-PCI Bridge which is routed to the PMC PCI Interface.
The TPMC632-x0 has 64 ESD-protected TTL lines; the TPMC632-x1 provides 32 differential I/O lines using EIA422 / EIA485 compatible, ESD-protected line transceivers. The TPMC632-x2 provides 32 TTL and 16 differential I/Os. All lines are individually programmable as input, output or tri-state. The receivers are always enabled, which allows determining the state of each I/O line at any time. This can be used as read back function for lines configured as outputs. Each TTL I/O line has a pull resistor. The pull voltage level is selectable to be either +3.3V, +5V and GND. The differential I/O lines are terminated by 120 Ohm resistors.
The FPGA is connected to a 128 Mbytes, 16 bit wide DDR3 SDRAM. The SDRAM-interface uses a hardwired internal Memory Controller Block of the Spartan-6.
The FPGA is configured by a platform flash or SPI flash. Both configuration flashes are in-system programmable. An in-circuit debugging option is available via a JTAG header for read back and real-time debugging of the FPGA design (using Xilinx ChipScope).
The TPMC632 provides front panel I/O via a HD68 SCSI-3 type connector and rear panel I/O via P14.
User applications for the TPMC632 with XC6SLX45T-2 FPGA can be developed using the design software ISE WebPACK, which can be downloaded free of charge from www.xilinx.com. The larger FPGA densities require a full-licensed ISE Design Suite.
TEWS offers an FPGA Development Kit (TPMC632-FDK) which consists of a well-documented basic example design. It includes a .ucf file with all necessary pin assignments and basic timing constraints. The example design covers the main functionalities of the TPMC632. It implements a DMA capable PCIe endpoint with interrupt support, register mapping, DDR3 memory access and basic I/O. It comes as a Xilinx ISE project with source code and a ready-to-download bitstream.
Please note: The basic example design requires the Embedded Development Kit (EDK), which is part of the Embedded or System Edition of the ISE Design Suite from Xilinx (downloadable from www.xilinx.com; a 30 day evaluation license is available)
About TEWS TECHNOLOGIES
Founded in 1975 by Uwe Tews, privately-held TEWS TECHNOLOGIES offers turnkey design, production and manufacturing services for its growing list of OEM customers. Today, TEWS continues its 'total solutions' approach to engineering embedded I/O board products for AMC, PMC, IndustryPack, CompactPCI and standard PCI product lines. It also offers a complete line of software drivers for most major embedded operating systems. TEWS TECHNOLOGIES, headquartered in Halstenbek, Germany, manufactures all products to meet ISO9001 standards. The company's complete line of embedded I/O solutions is available through a global network of distributors. For more information, go to www.tews.com.
